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Synopsys, TSMC partner to accelerate AI chip design with agentic AI workflows

Synopsys, TSMC partner to accelerate AI chip design with agentic AI workflows

BitgetBitget2026/09/23 19:01
  • Synopsys entered a collaboration with TSMC to speed development of next-generation AI and high-performance computing chips.
  • Partnership covers certified EDA flows for TSMC’s A14 node, aiming to cut design risk and shorten time-to-tape-out.
  • Joint work includes agentic AI-assisted design automation for analog, digital, and multi-die engineering workflows.
  • Collaboration extends multi-die enablement on TSMC’s CoWoS packaging, targeting power integrity and thermal constraints in AI systems.
  • Companies also expanded IP enablement on advanced nodes, citing milestones for PCIe 7.0 and HBM4 on TSMC’s N2P process.


Disclaimer: This news brief was created by Public Technologies (PUBT) using generative artificial intelligence. While PUBT strives to provide accurate and timely information, this AI-generated content is for informational purposes only and should not be interpreted as financial, investment, or legal advice. Synopsys Inc. published the original content used to generate this news brief via PR Newswire (Ref. ID: 202609231501PR_NEWS_USPR_____SF54659) on September 23, 2026, and is solely responsible for the information contained therein.

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