Intel unveils next-generation server chip Diamond Rapids, betting on the AI Agent era

Intel officially unveiled its next-generation server processor, Diamond Rapids, at Hot Chips 2026, highlighting up to 256 P-cores and the brand-new Fan-out Fabric architecture as its core features. The product is positioned as enterprise-level AI Agent infrastructure, directly competing with the increasingly fierce challenges from AMD and Arm.

Diamond Rapids will be manufactured using Intel's 18A-P process and supports up to 1.6TB/s memory bandwidth, 128 PCIe Gen 6 lanes, and CXL 3.0, with core counts over 50% higher than the previous Xeon 6 generation. Intel CEO Pat Gelsinger recently suggested that due to the surging CPU demand for AI Agent workloads, the future product roadmap may be accelerated.

This debut comes amid a rapidly evolving data center CPU landscape. AMD offers a 256-core "Zen 6" EPYC Venice processor, while Nvidia is advancing a dual-track CPU strategy targeting both x86 and Arm, putting Intel’s dominance in the server market under increasing pressure.

The most notable technological change with Diamond Rapids is Intel's claim of it being "the first CPU to adopt a Fan-out Fabric architecture." This architecture breaks the chip’s functions into four key modules: Scalable Compute Building Blocks, Centralized I/O & Memory Fabric Hub, Unified Memory Fabric, and Flexible I/O Fabric.

Physically, the entire chip is composed of 22 independent dies, specifically including 16 core chiplets built on Intel’s 18A-P process, 2 Fabric Hubs based on Intel 3 process, and 4 Base Tiles fabricated using Intel 3-T process, all interconnected using Foveros Direct 3D hybrid bonding and UCIe-S copper interconnects. This design is highly similar to AMD EPYC Venice, which uses multiple CPU chiplets around a large I/O die.

A key distinction from the previous Granite Rapids is that Diamond Rapids separates the memory controllers from the compute chiplets and places them in the Fabric Hub, enabling greater scalability. Each Compute Building Block contains 16 cores and integrates a 3D Xbar that connects the cores to the Last Level Cache (LLC) on the Base Tile. The chip as a whole features 1.28GB of shared LLC, with each Base Tile housing 320MB.

In terms of core count, Diamond Rapids supports up to 256 P-cores based on the Panther Cove-X architecture, structured as four Compute Building Blocks each with four core chiplets—doubling the maximum 128 cores of Xeon 6 and matching AMD EPYC Venice’s 256-core ceiling.

For its memory subsystem, Diamond Rapids supports a 16-channel design. With MRDIMMs, speeds can reach up to 12800 MT/s, and standard DDR5 up to 8000 MT/s, resulting in a peak memory bandwidth of 1.6TB/s. In terms of I/O, the chip provides 128 PCIe Gen 6 lanes and supports CXL 3.0, offering extensive expandability for storage and networking-heavy scenarios. Furthermore, it introduces the new Advanced Performance Extensions (APX) and enhanced Advanced Matrix Extensions (AMX) to accelerate AI inference and matrix operations.

It is noteworthy that Diamond Rapids does not support simultaneous multithreading (SMT); this feature will return in the successor, Coral Rapids. Platform-wise, the chip uses the LGA 9324 socket with a TDP of up to 650W.

In terms of product planning, Intel’s next release after Diamond Rapids will be Coral Rapids, expected around mid-2028, which will reintroduce SMT support and adopt an 8-channel memory platform. Pat Gelsinger recently noted that the schedule for this product line could be moved forward, given the surging demand for general-purpose processors in AI Agent workloads. It’s worth noting that Intel previously planned an 8-channel version of Diamond Rapids but ultimately canceled it, focusing resources on the 16-channel variant.

In terms of competition and collaboration, Intel is working with Nvidia on a custom SKU featuring an NVLink interface, reportedly under development for Nvidia’s use. This move means the Xeon architecture will become an integral part of Nvidia’s diversified CPU strategy. At the same time, Intel will face direct competition with Nvidia’s Vera and AMD Venice in the data center CPU market.

Intel’s bet is that the AI Agent era will restore the strategic value of general-purpose processors in AI infrastructure, allowing the Xeon line to seize a larger market share. Whether this can be achieved will largely depend on Diamond Rapids’ mass production schedule and delivery performance.